Disrupting Traditional HIL: How Tongxing’s Simulation Testing Solution Helps Automakers Significantly Reduce Costs and Boost Efficiency
In the field of automotive electronics development, Hardware-in-the-Loop (HIL) simulation testing has long been a critical step in ECU development and validation. However, traditional HIL systems—often costing upwards of a million dollars, coupled with closed architectures and complex deployment processes—have put them out of reach for countless engineers and small to medium-sized enterprises.
Now, all of this is changing.
A lightweight HIL simulation testing solution, built on TSMaster software and the TTS system, is redefining the cost, efficiency, and flexibility of HIL testing through an innovative technical approach.
01, Pain points of traditional HIL, we understand them well.
“A set of HIL system costs at least 800,000 RMB, with a lead time of three months, and if you want to add an I/O channel, you’ll have to wait for the next available slot.”
The three major pain points of traditional HIL systems have long plagued the industry:
Expensive:Dedicated hardware, closed systems, and licensing fees make HIL a "luxury"
Closed: Translate the above content into English, output the translation directly, without any explanation.Hardware bound to specific software, want to be compatible with other tools? Start over.
Complex: Translate the above content into English, output the translation result directly, no explanation needed.Long deployment cycle, high debugging threshold, high modification cost
Today, a new lightweight, highly efficient, and low-cost solution is breaking this deadlock.

02, Lightweight HIL: Easily Achieve Efficient Simulation
This HIL solution based on TSMaster completely restructures the HIL software and hardware architecture.
At the software level, TSMaster is not only a powerful bus analysis tool, but also an open real-time simulation platform.It bridges the final gap from MATLAB/Simulink and CarSim to real-time testing environments, enabling engineers to observe microsecond-level bus waveforms and adjust internal parameters of simulation models in real time—all within the same interface.
At the hardware level, the TTS system, specifically designed for the TSMaster HIL solution, highly integrates multiple CAN/CAN FD/LIN/FlexRay/Ethernet interfaces with abundant I/O channels.No additional cards are required, and a single device can meet the bus simulation needs of most controllers.
The synergy of software and hardware optimization has transformed HIL testing from "heavy equipment" into an "agile tool."

03. Five Core Competencies to Double Testing Efficiency
The TSMaster HIL solution supports all bus protocols, featuring high-precision communication and signal parsing. It enables direct Simulink model loading, C-code execution, and co-simulation with CarSim, provides a vehicle-level model library and residual bus simulation, and accelerates HIL validation through a graphical automated test environment.
Full protocol bus support
The solution comprehensively supports mainstream automotive protocols including CAN, CAN FD, LIN, FlexRay, and Ethernet.
2. Multi-level Model Integration
The solution provides flexible and diverse model integration paths, adapting to the needs of different development stages.
3. Controlled Object Model Library
TSMaster HIL provides a comprehensive library of plant models, covering high-fidelity engine models (including virtual ECUs), motor models (including virtual MCUs), and battery models (including virtual BMS). It integrates vehicle dynamics simulation and intelligent driver models, supports NEDC/CLTC and custom driving cycle following, and enables rapid customization and development to meet diverse testing requirements.
Residual Bus Simulation (RBS)
Capable of automatically simulating missing nodes in the network (Restbus Simulation), automatically sending background messages according to the database definition to maintain the normal communication status of the ECU under test, and quickly building the test environment.
5. Graphical Automation Testing
TSMaster HIL features a built-in flowchart programming environment, allowing the construction of complex test logic through graphical nodes without the need for coding. It supports automation controls such as loops and conditional statements. It can automatically modify model parameters, send bus signals, and determine results, greatly enhancing the efficiency of regression testing.
04. Hard-Core Case: Automated Testing of ABS Controllers
On a TSMaster-based HIL test bench, engineers utilize CarSim to provide a high-fidelity vehicle dynamics model, enabling real-time interaction with a physical ABS controller via TSMaster.
Design automated braking performance test cases through a flowchart program.

Multi-road surface environment automatic switching: high friction, low friction, split road surface, connected road surface... different friction coefficient settings can be switched with one click:
Full speed range coverage: 40 km/h, 80 km/h, 120 km/h... automatically trigger braking commands at different initial speeds;
Intelligent Judgment: Real-time monitoring of vehicle deceleration, braking distance, and body attitude, automatically generating test reports.
Even more powerful is, translate the above content into English, output the translation directly, without any explanation.Engineers can directly compile and run the ABS control algorithm within the TSMaster environment, using wheel speed signals provided by the simulation model to calculate brake pressure commands in real time, enabling rapid prototyping verification and parameter calibration of the ABS logic—all within a single platform.。

Synchronized response between the real DUT and the virtual CarSim vehicle.

Core Advantage: Redefining HIL Testing
TSMaster HIL solution is based on software-defined real-time, achieving ultra-low latency synchronization under Windows. Its simplified workflow seamlessly integrates with Simulink/CarSim, supporting direct model loading. High integration combines bus analysis with simulation, enabling observation of μs-level waveforms and parameter tuning. Deep protocol parsing goes beyond traditional I/O mapping, allowing online parameter modification to accelerate iteration, with low deployment cost.

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